RC Ladder Interconnect Delay

Every real wire — an on-chip interconnect, a length of coax, a network cable — carries a signal that does not arrive everywhere at once. This simulator models a chain of N resistor-capacitor stages as a real coupled ODE, numerically integrated node by node, and animates the step response crawling down the ladder in 3D. Live readouts compare the simulated 50%-arrival delay at the far end against the analytical Elmore delay formula that circuit designers use to estimate interconnect timing without solving the full system by hand.