Moore's Law — Transistor Scaling Simulator

Nanotechnology's industrial history is inseparable from the semiconductor industry's relentless miniaturization: the same exponential curve that took chips from 2,300 transistors in 1971 to tens of billions today is what dragged feature sizes down through the micrometer scale and into the nanometer regime, where scanning-probe microscopy, atomic-layer deposition and quantum-tunneling effects stopped being laboratory curiosities and became everyday engineering constraints. This simulator renders a fixed patch of chip die as a 3D grid of instanced transistor cells and lets you scrub or animate a timeline from 1971 to 2035, live-computing transistor count, feature size and areal density from Moore's Law's doubling-period formula — with an adjustable doubling period so you can see how a faster or slower scaling law would have changed the outcome.