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🎯 NUMA Memory Access & False Sharing

Compare the latency penalty when two cores write to adjacent variables sharing one cache line versus a padded, aligned layout, and see how NUMA memory placement compounds the cost.

Computer Science3DModerate60 FPS

The simulation compares two cores writing to adjacent variables packed on one cache line against the same variables padded onto separate lines, showing the resulting coherence traffic and latency difference, with an optional NUMA node placement layer added on top.

🔬 What It Demonstrates

🎮 How to Use

Toggle between packed and padded memory layouts and assign cores to the same or different NUMA nodes, then run the write workload to compare measured latency and coherence event counts between configurations.

💡 Did You Know?

Padding a single 4-byte counter out to a full 64-byte cache line wastes 60 bytes of memory per counter, yet this deliberate waste can make heavily contended multithreaded code run several times faster.

⚙ Under the hood

Compare the latency penalty when two cores write to adjacent variables sharing one cache line versus a padded, aligned layout, and see how NUMA memory placement compounds the cost.

computer-architecturenumafalse-sharingcache-coherencemulticoreperformance-tuningparallel-computing

3D · Three.js / WebGL renderer · 60 FPS target · runs fully client-side, no install