HomeComputer ScienceTomasulo's Algorithm: Out-of-Order Execution & Register Renaming

🧮 Tomasulo's Algorithm: Out-of-Order Execution & Register Renaming

Watch instructions dispatch into reservation stations, rename registers to eliminate false dependencies, and complete out of program order via a common data bus in this interactive Tomasulo's algorithm simulation.

Computer Science3DModerate60 FPS
tomasulo-out-of-order-execution-lab ↗ Open standalone

The simulation shows a stream of instructions dispatching into reservation stations, waiting on or receiving tagged operands broadcast over a common data bus, and executing and completing out of their original program order.

🔬 What It Demonstrates

The simulation shows a stream of instructions dispatching into reservation stations, waiting on or receiving tagged operands broadcast over a common data bus, and executing and completing out of their original program order.

🎮 How to Use

Dispatch instructions one at a time or as a batch and watch each one occupy a reservation station, track its operand tags, and light up on the common data bus when it completes, with dependent instructions visibly unlocking as their inputs arrive.

💡 Did You Know?

Robert Tomasulo won the 1997 Eckert-Mauchly Award for an algorithm he designed three decades earlier, one that now runs, in spirit, inside nearly every smartphone and laptop CPU on the planet.

⚙ Under the hood

Watch instructions dispatch into reservation stations, rename registers to eliminate false dependencies, and complete out of program order via a common data bus in this interactive Tomasulo's algorithm simulation.

computer-architectureout-of-order-executiontomasulo-algorithmregister-renamingcpu-pipelinemicroarchitectureinstruction-level-parallelism

3D · Three.js / WebGL renderer · 60 FPS target · runs fully client-side, no install

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