Phase-Locked Loop: Locking Onto a Signal

Three blocks in a loop

A phase-locked loop is built from three parts wired in a ring: a phase detector that compares the phase of an incoming reference signal with the phase of the loop's own output, a loop filter that smooths that comparison into a clean control voltage, and a voltage-controlled oscillator (VCO) whose frequency is set by that voltage. The VCO's own output is fed back into the phase detector, closing the loop.

reference in ──► phase detector ──► loop filter ──► VCO ──► output
                       ▲                                   │
                       └───────────── feedback ─────────────┘

If the VCO drifts ahead in phase, the detector reports a positive error, the filter turns that into a control voltage that slows the VCO down; if it falls behind, the loop speeds it up. Negative feedback, exactly as in any control system, drives the phase error toward a small, stable value — and once it gets there, the VCO's frequency has necessarily locked to the reference frequency too, since a phase error that stops changing means the two frequencies are identical.

Capture range, lock range, and the filter's job

A PLL cannot lock onto anything from any starting point instantly. The lock range is the band of frequencies around the VCO's free-running frequency over which, once locked, the loop stays locked as the input drifts. The capture range — usually narrower — is the band over which an unlocked loop can acquire lock in the first place, and it is set largely by the loop filter's bandwidth: a narrower filter rejects more noise once locked but takes longer, and can capture over a smaller range, when starting from scratch.

The loop filter is not incidental plumbing — it is what turns three simple blocks into a stable second-order control system. Too little filtering and the loop is noisy and prone to overshoot; too much and it reacts too slowly to track a genuinely moving reference. Real designs pick the filter's time constant deliberately to balance lock speed, noise rejection and stability, in exactly the same language used for any feedback control loop: damping ratio and natural frequency.

Frequency synthesis: one crystal, many frequencies

Insert a programmable divide-by-N counter between the VCO's output and the phase detector's feedback input. The loop still forces the divided signal to match the reference frequency, which means the VCO itself must run at exactly N times the reference. Change N — a purely digital operation — and the output frequency jumps to a new multiple of the same stable reference, with no new crystal needed. This is frequency synthesis, and it is how a single crystal oscillator inside a radio, a WiFi chip or a synthesizer keyboard generates every channel or note it needs.

Demodulation and clock recovery

Because the VCO's control voltage is, by construction, whatever it takes to track the input's instantaneous frequency, that control voltage itself carries information whenever the input is frequency-modulated. Tapping it off directly recovers the original modulating signal — this is exactly how a PLL demodulates FM radio without a separate discriminator circuit. The same tracking behaviour, applied to a noisy digital data stream instead of a smooth carrier, recovers a clean clock synchronized to the incoming bits — clock and data recovery, essential in every serial digital link that does not carry its clock on a separate wire.

Types of phase detector

Simple analogue PLLs often use a multiplier (mixer) as the phase detector, whose output contains a term proportional to the sine of the phase difference — accurate near zero error, but nonlinear far from it. Digital PLLs typically use a phase-frequency detector built from flip-flops, which produces separate up and down pulses whose width is proportional to phase error and, crucially, also reports which signal is faster even before lock, giving the loop a much wider, more reliable capture range than a pure phase comparator.

Frequently asked questions

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