Banking HSM Tamper-Response & Key Zeroization Lab

Core-banking and SWIFT transaction-signing keys live inside Hardware Security Modules that never expose them to software — the last line of defense is physical: a tamper-respondent mesh of conductive traces cast around the key store, wired to a comparator that trips on any resistance change and triggers immediate key zeroization. This simulator renders that mesh in 3D as a geodesic cage of sensor traces around a glowing key vault, drives a simulated drilling attack against it at a controllable speed, and lets you tune both sides of the contest — the mesh's trace density and the HSM's comparator threshold and zeroization clock speed — while live readouts track the comparator's ΔV signal, the shim-bypass ceiling a partial cut can hide behind, and how many attempts end in a safely zeroized key versus a compromised one. It's a hands-on way to see why a comparator threshold tuned only to avoid false alarms can quietly erase the response margin that keeps a breached HSM's keys from being extracted.