Unlike a decorative "synced dots" animation, every quantity here is computed sample by sample from real signals:
- Phase detector — an analog multiplier (mixer), the same building block real PLL chips use. It multiplies the reference waveform sin(φref) by the VCO's quadrature output cos(φvco): the product is ½[sin(φref−φvco) + sin(φref+φvco)] — a slow term proportional to the true phase error plus a fast "sum" ripple at roughly twice the carrier rate.
- Loop filter — a genuine one-pole RC-style low-pass, updated every sample as
lpf += α·(mixer − lpf). It is this filter that removes the fast ripple and leaves the slow error term as a clean control voltage.
- VCO — its instantaneous frequency is
f_center + K·lpf: the filtered control voltage genuinely shifts the oscillator's frequency, which is then integrated (φvco += 2πf·dt) to obtain phase. There is no shortcut back to a target phase — frequency and phase are both state that accumulates over real simulated time.
Applying a reference frequency step moves the target the VCO must chase; the loop filter's bandwidth α sets how fast it can respond. A larger α locks faster but passes more of the mixer's ripple through to the control voltage, so the steady-state trace visibly wobbles; a smaller α is smoother and more stable but takes longer to re-acquire — the classic PLL speed-vs-stability tradeoff.
Approximation: dimensionless "Hz" (cycles per simulated second) rather than a physical radio band, and a single-pole filter rather than the switchable 2nd-order filter bank used in the 3D PLL companion sim.