⚡ Buck Converter — PWM Switching

Simulate a DC-DC buck converter: PWM duty cycle D controls output V_out = D·V_in. See inductor current ripple ΔI_L = (V_in−V_out)·D/(L·f_sw) and capacitor voltage ripple.

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Live waveforms: switch node, inductor current, output voltage · P pause · R reset

How it Works

A buck converter is a switching DC-DC power supply that steps down voltage with high efficiency. The MOSFET switch turns on and off at switching frequency f_sw. When on, the inductor stores energy; when off, it releases energy through the freewheeling diode. The average output voltage equals D·V_in.

The canvas shows three waveforms scrolling in real time: the switch node voltage (green, top), the inductor current (amber, middle), and the output capacitor voltage (teal, bottom). Adjust duty cycle, inductance, capacitance, and frequency to see the direct effect on ripple.

V_out = D × V_in
ΔI_L = (V_in − V_out) × D / (L × f_sw)
ΔV_C = ΔI_L / (8 × C × f_sw)
L_crit = (1−D) × R_load / (2 × f_sw)

Frequently Asked Questions

What is a buck converter?

A buck converter is a DC-DC switching power supply that steps down (reduces) voltage from input to output while ideally maintaining 100% efficiency. It uses a transistor switch, inductor, diode, and capacitor to regulate voltage.

How does PWM duty cycle control output voltage?

In a buck converter, the output voltage equals the input voltage multiplied by the duty cycle D (0 to 1): V_out = D × V_in. A 50% duty cycle halves the voltage. The PWM switch alternates at high frequency, and the inductor averages the switching waveform.

What causes inductor current ripple in a buck converter?

Inductor current ripple ΔI_L = (V_in − V_out) × D / (L × f_sw) arises because when the switch is on, voltage (V_in − V_out) is applied across the inductor, linearly increasing current. When off, the inductor freewheels through the diode, decreasing current.

What is the role of the output capacitor?

The output capacitor smooths the pulsating inductor current into a steady DC voltage. The capacitor voltage ripple ΔV_C = ΔI_L / (8 × C × f_sw) is minimized with larger capacitance or higher switching frequency.

Why operate at high switching frequency?

Higher switching frequency reduces ripple in both inductor current and output voltage, allowing smaller inductors and capacitors. However, switching losses in the transistor increase with frequency, so there is an efficiency tradeoff.

What is the difference between CCM and DCM?

Continuous Conduction Mode (CCM) means inductor current never reaches zero. Discontinuous Conduction Mode (DCM) occurs at light loads when inductor current hits zero each cycle. CCM provides lower ripple but DCM can be more efficient at light loads.

How is efficiency calculated for a buck converter?

Ideal efficiency is 100% since no energy is dissipated in an ideal buck converter — only stored and transferred. Real converters lose energy to switch resistance (conduction losses), switching transitions, inductor ESR, and diode forward voltage.

What is the voltage conversion ratio in continuous conduction mode?

In CCM, V_out/V_in = D (the duty cycle). This linear relationship makes control straightforward. In DCM, the conversion ratio depends on duty cycle, inductance, switching frequency, and load current.

How does inductor size affect buck converter performance?

Larger inductance L reduces current ripple ΔI_L, which means smoother output current and less capacitor stress. However, larger inductors are physically bigger, heavier, and have more resistance. The critical inductance separating CCM and DCM is L_crit = (1−D)·R/(2·f_sw).

What is a synchronous buck converter?

A synchronous buck converter replaces the freewheeling diode with a second MOSFET that turns on when the main switch is off. This reduces the forward voltage drop loss (from ~0.7V diode to ~millivolts across MOSFET), significantly improving efficiency at high currents.

About this simulation

This simulation runs a live time-stepped model of a DC-DC buck converter, updating inductor current and capacitor voltage every switching cycle from the actual on/off state of the PWM switch. Three scrolling waveforms — switch node, inductor current, and output voltage — show V_out = D·V_in settling in real time as you change duty cycle, inductance, capacitance, or switching frequency.

🔬 What it shows

A step-by-step buck converter simulation (dt = 1/(f_sw·40)) tracking inductor current iL and capacitor voltage vC each cycle, with live-computed V_out, ΔI_L ripple, ΔV_C ripple, CCM/DCM mode (via L_crit), and estimated efficiency.

🎮 How to use

Drag V_in, Duty Cycle D, Inductance L, Capacitance C, and Frequency f_sw to see immediate effects on the waveforms and stats. Use Reset to clear history and Pause (or press P) to freeze the animation; R resets.

💡 Did you know?

Real buck converters often replace the freewheeling diode with a second MOSFET (a "synchronous" buck), cutting the forward-voltage loss from about 0.7V down to just a few millivolts — a major efficiency win at high load currents in phone chargers and laptop power supplies.

Frequently asked questions

Why does the inductor current waveform look like a sawtooth?

While the switch is on, voltage (V_in − V_out) is applied across the inductor and current rises linearly; when the switch turns off, the inductor freewheels and current falls linearly. This on/off cycling of slope produces the triangular ripple visible in the amber trace.

What happens if I drag Duty Cycle D close to 0 or close to 1?

Near D=0 the output voltage collapses toward zero since V_out = D·V_in; near D=1 the switch is almost always on and V_out approaches V_in. At the extremes ripple behavior and the CCM/DCM boundary (L_crit) become sensitive to small duty-cycle changes.

Why does raising Inductance L reduce ripple but the mode indicator can flip to CCM?

Larger L directly divides down ΔI_L = (V_in−V_out)·D/(L·f_sw), smoothing the current. Since the CCM/DCM boundary is L_crit = (1−D)·R/(2·f_sw), increasing L above that threshold keeps the inductor current from ever reaching zero, switching the simulation into Continuous Conduction Mode.

Why does increasing switching frequency f_sw shrink both ripple values?

Both ΔI_L and ΔV_C have f_sw in the denominator, so doubling the switching frequency roughly halves both ripples. This is why real-world converters push switching frequency up to shrink component size, though at the cost of higher switching losses in the MOSFET.

Why does the Efficiency stat decrease slightly as duty cycle rises?

This simulation applies a simplified efficiency estimate that penalizes higher duty cycle slightly, reflecting real-world effects like increased conduction losses. Actual efficiency also depends on switch resistance, inductor ESR, and diode forward-voltage drop, none of which are perfectly captured by a simple formula.