Qubit Fabrication Yield: Wafer Defect Density Model

Fabrication Parameters

Defect density D₀ 0.30 /cm²

Die size 6.0 mm

Qubits per die 4

Wafer Readout

Measured yield

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Theoretical yield e^(−D₀·A_crit)

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Good qubits harvested

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Good die — no defect in critical zone

Failed die — defect hit critical zone

Fabrication defect (point)

How it works

Real chip fabs (and superconducting-qubit foundries building the same way) predict die yield with a Poisson critical-area model. Point defects — dust, lithography voids, resist tears — land at random positions across the wafer at an average density D₀ (defects per cm²). A die only fails if a defect lands inside its critical area A_crit — the small fraction of the die (Josephson junctions, wiring pinch-points) actually sensitive to a defect:

A_crit = N_qubits · a_q            (a_q ≈ 0.0015 cm² per qubit)
λ = D₀ · A_crit                    (expected defects on one die's critical zone)
P(die survives) = P(0 defects) = e^(−λ)     ← Poisson probability of zero hits

This simulator scatters an actual Poisson-distributed set of defect points over the wafer (not just the formula) and tests each die's critical zone individually, so the measured yield you see is a real random sample — it converges to the theoretical e^(−λ) curve but jitters around it, exactly like a real wafer run.

Defect density D₀ — process maturity. A mature fab runs low D₀; a new process runs high D₀.
Die size — bigger dies pack fewer chips per wafer but change how the fixed-radius wafer edge is used.
Qubits per die — more qubits per chip means more critical area, so λ grows and yield falls — the core scaling tension quantum-hardware roadmaps face: bigger chips ship more qubits per good die, but fewer dies survive.
New Wafer — resamples the defect map for the current settings, showing run-to-run variance around the theoretical curve.

Real-world relevance: this is the same yield-vs-defect-density trade-off superconducting-qubit companies (IBM, Google, Rigetti) publish in their scaling roadmaps — it is one of the concrete engineering bottlenecks behind "more qubits" being harder than it sounds.

Good die Failed die Defect

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