A low-dropout regulator holds VOUT by letting an error amplifier drive a pass transistor so that the divided output VSET·R2/(R1+R2) equals a reference voltage (here an assumed 1.2 V, so VSET = VREF(1 + R1/R2)). While VIN - VSET exceeds the dropout voltage the output is regulated; below it the pass device is fully on and VOUT ≈ VIN - VDO.

The pass element carries the full load current, so it dissipates P = (VIN - VOUT)·ILOAD (plus VIN·Iq for the controller). Efficiency is VOUT·ILOAD / (VIN·(ILOAD+Iq)), about VOUT/VIN for small Iq. Junction temperature is estimated as 25 C + P·θJA with an illustrative θJA = 42 C/W, as in the 3D lab; no thermal shutdown is modelled.

The scope trace is a first-order model of the control loop with time constant τ = 1/(2π·fc). Real LDOs have a pole-zero structure set by the output capacitor and ESR, so this is a teaching approximation of line-transient behaviour, not a datasheet-accurate prediction.