Phase-Change Nanoswitch: Joule-Heating Set/Reset

Cell State

Crystalline (ON)

Resistance

3.0 kΩ

Crystalline fraction

100%

Peak temperature

300 K

Pulse energy

— pJ

Voltage Pulse

Pulse voltage 1.60 V

Pulse width 100 ns

Cell diameter 40 nm

Ambient temperature 300 K

How it works

A phase-change nanoswitch stores its logic state as the structural order of a nanoscale chalcogenide cell (e.g. Ge₂Sb₂Te₅). A voltage pulse Joule-heats the cell; the resulting temperature trajectory decides whether the cell crystallizes (low resistance, "ON") or melt-quenches into a disordered amorphous plug (high resistance, "OFF").

Joule heating:  P(t) = V² / R(X)
Thermal RC:     dT/dt = P/C_th − (T − T_amb)/τ_th
Resistance:     R(X)  = R_a · (R_c / R_a)^X
Crystallization (Arrhenius dome, T_x < T < T_m):
                dX/dt = k(T)·(1 − X),  k(T) = k_max·exp(−((T−T_pk)/w)²)
Melt-amorphize (T ≥ T_m):
                dX/dt = −k_melt·X

SET — a moderate voltage held long enough keeps T inside the crystallization dome, growing the ordered fraction X → 1 (low resistance).
RESET — a short, high-voltage spike drives T past the melting point T_m; the pulse ends before the melt can re-order, quenching the cell amorphous, X → 0 (high resistance).
Cell diameter shrinks the conduction cross-section, raising R and the power delivered per volt — real PCM scaling to smaller nodes lowers the switching current for the same effect.
A pulse too weak or too brief to cross the crystallization threshold leaves the state untouched — exactly how a low-energy "read" pulse avoids disturbing stored data.

Firing pulse…

Crystalline lattice site Amorphous / disordered site Electrode

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