Memristor Crossbar Array Simulator (2D)

Row input voltages (V)

V₁ 0.80

V₂ -0.40

V₃ 0.60

V₄ 0.20

Crossbar

Steps taken

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Elapsed

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Last mode

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Speed-up

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How it works

This flat schematic shows the same 4×4 grid of nanoscale memristors as the 3D version, viewed top-down. Each cross-point holds a memristive synapse whose electrical conductance G encodes one weight and stays put with power off. Row wires carry input voltages V₁…V₄ left-to-right; column wires collect the output top-to-bottom. By Ohm's law the current through the memristor at row i, column j is Iᵢⱼ = Vᵢ·Gᵢⱼ. By Kirchhoff's current law all currents landing on a column simply add: Iⱼ = Σᵢ Vᵢ·Gᵢⱼ — one row of a matrix-vector product, computed by physics, for the whole grid at once.

Iⱼ = Σᵢ Vᵢ · Gᵢⱼ   (Ohm + Kirchhoff, all columns at once)

Crossbar mode — every memristor conducts simultaneously; the output vector appears in one physical "step".
Von Neumann mode — the same 16 multiply-accumulates, done one at a time as a CPU shuttling weights from separate memory would. Watch the step counter and clock climb.
This is the core idea behind in-memory / analog AI accelerators: skip moving data between memory and a separate compute unit and let the wiring itself do the arithmetic.

Grid: 4 rows × 4 columns — top view

Row wire (input V) Memristor (brightness = G) Column wire / output

Output vector I = V·G

I₁0.00

I₂0.00

I₃0.00

I₄0.00