Every AI accelerator answers the same question — how many multiply-accumulate operations per second can it push through, and at what power cost — but gets there with a different mix of core count, clock speed and numeric precision. The die below renders each chip's compute cores as an InstancedMesh; a wave of color and height sweeps across active cores to represent data flowing through the pipeline (Loihi 2 instead fires sparse individual spikes, since its cores are event-driven, not clocked).
Throughput = Base_TFLOPS(chip) × precision_mult × (utilization / 100)
Power(W) = P_idle + (P_peak − P_idle) × (utilization / 100)^1.3
Efficiency = Throughput / Power (TFLOPS per watt, or GSOP/s per watt for Loihi)
Precision multiplier (relative to BF16/FP16 = 1×):
FP32 = 0.5× BF16/FP16 = 1× INT8 = 2× FP8 = 4×
(halving the bit-width roughly doubles ops/cycle packed into the same tensor core)
- Chip — swaps the base TFLOPS (or GSOP/s for Loihi's spiking cores), idle/peak power envelope and die layout for a different real accelerator.
- Precision — lower-precision math packs more operations per clock at some accuracy cost, which is exactly why production inference runs in INT8/FP8 rather than FP32.
- Utilization — the fraction of cores actually kept busy; power grows faster than linearly with load (the ^1.3 exponent) because leakage and voltage/frequency scaling both bite harder near peak.
Loihi 2's numbers live on a different scale on purpose — it trades raw TFLOPS for asynchronous, sub-watt operation, so its efficiency figure isn't directly comparable to the clocked accelerators, only within itself.