How a Transistor Works — From Silicon to CPU

What Is a Transistor?

A transistor is a three-terminal semiconductor device that can amplify or switch an electrical signal. In digital electronics, it operates as a switch with two states: on (conducting current) and off (blocking current). This binary behaviour maps directly to the 1s and 0s of digital computation.

The transistor was invented in December 1947 at Bell Labs by William Shockley, John Bardeen, and Walter Brattain — a discovery that earned them the 1956 Nobel Prize in Physics and launched the entire digital age.

Three terminals: Every transistor has three connections: Source (current enters), Drain (current leaves), and Gate (control input that switches the transistor on or off). In a bipolar transistor these are Emitter, Collector, and Base.

Why Silicon?

Silicon (Si) is the second most abundant element in Earth's crust and a semiconductor — a material whose electrical conductivity sits between that of a conductor (metal) and an insulator (glass).

Silicon has four valence electrons. In pure crystalline silicon, each atom shares all four with neighbouring atoms in a covalent bond lattice — leaving very few free charge carriers. Pure silicon conducts poorly at room temperature, but this can be precisely controlled by adding impurities (doping).

Key reasons silicon dominates:

Abundant and cheap: Made from ordinary sand (SiO₂).
Stable oxide: SiO₂ (silicon dioxide) is an excellent natural insulator, crucial for MOSFET gate insulation.
Controllable band gap: 1.12 eV — high enough to remain stable at room temperature; low enough to be switched by small voltages.
Mature fabrication: 70+ years of process optimisation.

Doping: Creating N-type and P-type Silicon

Doping means deliberately introducing trace amounts of another element (a dopant) into the silicon crystal lattice to change its electrical properties.

N-type silicon (negative carriers)

Adding a Group 15 element like phosphorus (5 valence electrons) into the silicon lattice leaves one electron with no bond partner. This extra electron is free to move — it's a negative charge carrier. N-type silicon conducts via free electrons.

P-type silicon (positive carriers)

Adding a Group 13 element like boron (3 valence electrons) creates a "hole" — a missing electron that appears as a positive charge. Other electrons hop to fill holes, which makes holes effectively drift in the opposite direction. P-type silicon conducts via holes.

The P-N Junction

When a region of P-type silicon is placed next to a region of N-type silicon, a P-N junction forms at the interface. This junction is the fundamental building block of diodes, transistors, LEDs, and solar cells.

At the junction, free electrons from the N-side diffuse across and recombine with holes from the P-side. This creates a depletion region — a zone depleted of charge carriers — which builds up an electric field (the built-in potential, about 0.6–0.7V for silicon). This field resists further diffusion and establishes an equilibrium.

This junction behaviour creates the diode's defining property: current flows easily in one direction (forward bias) but barely at all in the other (reverse bias). Connect two junctions back-to-back with a thin control region between them and you have a transistor.

I = I₀ · (e^(V / V_T) − 1) V_T = kT/q ≈ 26 mV at room temperature (thermal voltage) I₀ = reverse saturation current (very small, ~10⁻¹² A)

The MOSFET: The Modern Transistor

The MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is the transistor type used in virtually all modern CPUs and memory. It was first fabricated in 1960 and now accounts for the vast majority of the roughly 10²² transistors manufactured each year worldwide.

An N-channel MOSFET has:

A P-type silicon substrate
Two N-type doped regions: Source and Drain
A thin layer of SiO₂ (the gate oxide) above the channel between Source and Drain
A metal gate conductor on top of the oxide

⛔ OFF state (V_gate = 0V)

No voltage on the gate. The P-type channel under the gate has no free electrons. The source-drain path is blocked — the transistor is OFF. Current cannot flow (except for tiny leakage).

✅ ON state (V_gate = V_dd)

Positive voltage on the gate creates an electric field through the oxide. Electrons are attracted to the channel region, forming an inversion layer. A conductive channel forms from Source to Drain — the transistor is ON. Current flows.

The voltage required to switch the transistor on is called the threshold voltage (V_th), typically 0.3–0.7V in modern chips. Below V_th: off. Above V_th: on.

Why is the oxide layer so important? The SiO₂ gate dielectric is an insulator — no current flows from the gate into the channel. This means the gate draws essentially zero static current. For a CMOS logic gate, the transistor only dissipates power during a switching event, not while holding a state. This is why CMOS logic is so energy-efficient.

From Transistors to Logic Gates

CMOS (Complementary MOS) logic pairs N-channel and P-channel MOSFETs to build logic gates. The simplest is a NOT gate (inverter): one N-MOS and one P-MOS connected in series between the supply voltage and ground.

When input is HIGH (1): N-MOS switches on, P-MOS switches off → output connected to ground → LOW (0)
When input is LOW (0): P-MOS switches on, N-MOS switches off → output connected to supply → HIGH (1)

NAND and NOR gates each use 4 transistors. An XOR gate uses 8. A 1-bit full adder (adds two bits) uses about 28 transistors. An 8-bit adder: ~224. A 64-bit floating point unit: millions. A full modern CPU: 10–50 billion.

Moore's Law and the Limits of Miniaturisation

In 1965, Intel co-founder Gordon Moore observed that the number of transistors on a chip doubled roughly every 18–24 months. This observation — Moore's Law — held with remarkable accuracy for 50 years.

Year	Process node	Transistors (flagship CPU)
1971	10,000 nm	2,300 (Intel 4004)
1985	1,500 nm	275,000 (Intel 386)
2000	180 nm	42 million (Pentium 4)
2010	32 nm	1.16 billion (Core i7)
2020	5 nm	11.8 billion (Apple A14)
2026	2 nm	~20 billion (Apple A19 est.)

At 2 nm, a transistor gate is about 10 silicon atoms wide. Quantum tunnelling — electrons passing through barriers they classically cannot cross — becomes a fundamental limit. The industry is now hitting the physical walls of silicon-based miniaturisation.

What "2 nm" actually means: Process node numbers no longer directly correspond to any physical transistor dimension — they're now marketing names. TSMC's "2 nm" node uses FinFET/GAAFET (Gate-All-Around) transistors where the gate wraps around all four sides of the semiconductor channel, giving better electrostatic control at small scales.

Beyond Silicon

With silicon miniaturisation approaching physical limits, several paths forward are being explored:

3D stacking: HBM memory and 3D NAND stack multiple transistor layers vertically. Logic processors are now following (TSMC SoIC, Intel Foveros).
GaN and SiC: Wide-bandgap semiconductors for power electronics — excellent for EV inverters and fast chargers.
Carbon nanotubes: IBM has demonstrated CNT transistors at ~1 nm gate length, theoretically capable of operating 5× faster at 1/5 the power of silicon.
Spintronics: Using electron spin rather than charge as the information carrier — potentially much lower energy switching.
Quantum computing: Not transistors at all — uses quantum bits (qubits) that exploit superposition and entanglement. A fundamentally different paradigm.

Try It Yourself

The Game of Life demonstrates how complex computational behaviour emerges from simple binary rules — the same principle that underlies every CPU built from transistor logic gates:

🎮 Game of Life — Emergent Complexity →

See how quantum effects influence the N-body problem at atomic scales in the molecular dynamics simulation:

⚛️ Molecular Dynamics Simulation →